fWtoIEEER [D>=21]

Converts the contents of W from SPLat floating point format to big endian IEEE-754 format with reversed word order. This involves re-arranging the byte and bit order to make the number compatible with 3rd party equipment such as graphics HMIs.

With this instruction the lower 16 bits are saved first (lower address) and upper 16 bits saved last (upper address). This is done to provide compatibility with certain 3rd party devices that use reversed word order. In general, different companies handle floating point formats in different ways, so compatibility can be elusive.

After this instruction has been executed the data in W should NOT be operated on with any floating point calculation.

This instruction is not accurately simulated by SPLat/PC. In simulation W is set to NaN (Not a Number). That means you cannot use it to explore the various floating point formats.

Explanation: The floating point format adopted in SPLat is a special format designed to be more efficient for implementation in an 8-bit processor. It keeps mantissa and exponent in separate bytes, whereas in IEEE they cross byte boundaries.

Dialect restriction: Available only in boards with dialect 21 or greater.