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As of August 2007, boards with dialect 20 or later will not support TSP. Please refer to Xwire instead. If you need a board with TSP you can reFLash a dialect 20 board back to an earlier dialect.
TSP is modelled on the concept of having two processors (the SPLat controller and the TSP device's processor) interact by means of reading and writing a shared memory. Physically that memory is located within (owned by) the TSP processor. It may be 10 bytes or it may be hundreds of bytes, depending on the particular TSP.
What the contents of each memory location means depends entirely on the particular TSP. For example, if the SPLat writes a 5 to location 67 it may be interpreted as a command for the TSP to do something or it may mean simply that a piece of data has been updated ... it all depends on what interpretation the particular TSP processor places on it. Similarly, the TSP processor might write 245 to location 10, and the SPLat must know on reading that out how to interpret it.
Data transfers in and out of the SPLat take place via the U register, with V acting as a byte counter in certain instances. U provides a 20-byte holding register. The maximum number of bytes of data that can be transferred to a TSP device in one message is 16 bytes.
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